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0 votes

1 answer

line cant be hidden correctly

asked Mar 9, 2024 in Question / help by doge

+1 vote

0 answers

Is it possible to get rackdiag and packetdiag by integrated into plantuml?

asked Oct 11, 2024 in Wanted features by brooksd (120 points)

0 votes

0 answers

Can it be further simplified?

asked Apr 6, 2024 in Question / help by shiuang (120 points)

+1 vote

1 answer

https:"UML" link cannot be opened on PlantUML Web Server

asked Mar 11, 2021 in Wanted features by kirchsth (7,760 points)

0 votes

1 answer

Can multiline parameters be sent to procedure

asked Mar 28, 2025 in Question / help by anonymous

0 votes

0 answers

Cannot add "notes" to binary or analog signals in timing diagrams

asked Aug 4, 2022 in Bug by jk

0 votes

2 answers

How to color the shapes of a Repeat While?

asked Mar 5, 2024 in Question / help by smj (120 points)

0 votes

1 answer

asked May 20, 2021 in Wanted features by anonymous

0 votes

2 answers

Is it possible to add logical gates like OR/AND gates to component diagram?

asked Oct 3, 2023 in Wanted features by Marcus

0 votes

0 answers

Crash when using @startgit

asked Jul 14, 2021 in Bug by albert (3,620 points)