To hide a long/non-interesting part of timing diagram

+4 votes
asked Jan 26, 2021 in Wanted features by forgi007 (120 points)
Hi, it would be good to be able to put a kind of break into the timing diagram. {hide} seems not working for binary or clock signals. Some better style of break (different to hiding) would be also great (like to tear the lines).

Thanks a lot for this great tool!

2 Answers

0 votes
answered Jun 3, 2022 by awschult (460 points)
Here is a related request

https://forum.plantuml.net/7582/compress-skip-time-in-timing-diagram?show=7582#q7582

no progress has been made that I am aware of
0 votes
answered 22 hours ago by dmf19 (580 points)
This is now implemented as `break <from> to <to>`, which squeezes the stretch
and draws a torn (zigzag) edge on every signal type, including binary and
clock. Details, example and code in the answer on
https://forum.plantuml.net/7582/compress-skip-time-in-timing-diagram
...