Timing diagram, how to create a clock that is low in the middle

0 votes
asked Oct 25 in Question / help by bingdaohaidao (120 points)
Hi PlantUML team  

   i want to create a clock that is only toggling when its related enable signal is high.

currently i use the "robust" to generate this clock but it's too heavy to create clock when i want more clocks like that.  

   below is my code, any suggestion about this ?

@startuml
hide time-axis
scale 100 as 300 pixels
mode compact

clock "clka" as C0 with period 10 offset 0
binary "enable" as en
robust debug_clk
debug_clk has high,low

@debug_clk
0 is low
60 is high
70 is low
80 is high
90 is low
100 is high
110 is low
120 is high
130 is low
140 is high
150 is low

@0
en is low

@50
en is high

@160
en is low

@enduml

Thanks

1 Answer

0 votes
answered Oct 25 by The-Lu (73,540 points)
selected Oct 26 by bingdaohaidao
 
Best answer

Hello B.,

It is not yet possible.
But that will be a good wanted feature, as:

Here is an inconclusive attempt, adding:

clock "debug_clk2" as C2 with period 20 offset 60

Regards,
Th.

commented Oct 26 by bingdaohaidao (120 points)
okay, it can't fully meet my requirement, hopefully my requirement can meet in the future.
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